A multivibrator is a two-state circuit whose output rests at one of two saturation rails and switches between them on a defined condition. The three families are distinguished only by how many of those states are stable. A bistable holds either state indefinitely. A monostable holds one state and visits the other for a fixed interval. An astable holds neither and oscillates between them.
Every multivibrator shares the same skeleton: a comparator with positive feedback to its non-inverting input and an RC network on its inverting input. The output is two-valued, resting at $+V_\text{sat}$ or $-V_\text{sat}$. The three families differ only in the role of the RC network and of any external trigger.
A bistable is a comparator with positive feedback. The output returns through the divider $R_1, R_2$ to the non-inverting input, so the comparator references a fixed fraction of its own output. That fraction,
sets two switching thresholds, $V_\text{TH} = +\beta V_\text{sat}$ and $V_\text{TL} = -\beta V_\text{sat}$. While the inverting input lies between them, the output stays at whichever rail it was last driven to. Both rails are stable; the feedback reinforces the current state.
Switching requires the input to cross the active threshold. With the output at $+V_\text{sat}$ the active threshold is $V_\text{TH}$, and the input must rise above it to drive the output to $-V_\text{sat}$. The active threshold then becomes $V_\text{TL}$, and a fall below $V_\text{TL}$ is required to switch back.
A monostable, or one-shot, has one stable state and one quasi-stable state of fixed duration. The trigger $V_\text{trig}$ drives the non-inverting node, which is also the tap of the divider $R_1, R_2$ from the output. A resistor $R$ feeds the output back to the inverting input, where a capacitor $C$ to ground sets the timing and a diode $D$ clamps $v_C$ against rising too far.
At rest, $V_\text{trig}$ holds $v_+$ near its quiescent value. The output sits at $+V_\text{sat}$ and the diode is forward-biased, clamping $v_C \approx V_D$. With $v_+ > v_-$ the comparator stays latched and the circuit waits indefinitely.
A negative pulse on $V_\text{trig}$ pulls $v_+$ below $v_C$. The comparator flips, the output snaps to $-V_\text{sat}$, and the diode reverse-biases. The capacitor discharges through $R$ from $V_D$ toward $-V_\text{sat}$ along an exponential. With the output now negative, the divider holds $v_+$ at $-\beta V_\text{sat}$, so the threshold $v_C$ must cross to flip the comparator back is
Once $v_C$ reaches $V_\text{TL}$, the comparator flips to $+V_\text{sat}$, the diode reclamps $v_C$ at $V_D$, and the circuit returns to rest. The pulse duration is
where the second form neglects $V_D$. The width is fixed by $R$, $C$, and $\beta$, and is independent of the trigger that initiated it.
An astable removes the clamping diode of the monostable and allows the capacitor to charge through $R$ in either direction. The circuit never rests; whenever the output is at one rail, the capacitor is moving toward the threshold that will flip it.
With the output at $+V_\text{sat}$, the capacitor charges toward $+V_\text{sat}$ along the exponential
When $v_C$ reaches $V_\text{TH} = +\beta V_\text{sat}$, the comparator flips the output to $-V_\text{sat}$. The capacitor then charges from $+\beta V_\text{sat}$ toward $-V_\text{sat}$ until it reaches $V_\text{TL} = -\beta V_\text{sat}$, at which point the output flips back. Solving for the half-period gives
The period depends only on $RC$ and $\beta$. With symmetric rails the output is a 50% duty-cycle square wave, and $v_C$ is a piecewise exponential bounded by the two thresholds.
The three families occupy three timing roles. The bistable stores one bit of state. The monostable converts an event into a pulse of defined duration. The astable produces a periodic clock or carrier with no input.
Cross-coupled bistables, refined into SR and D latches, form the storage cells of every register, counter, and finite-state machine in digital instrumentation.
A bistable with two cross-coupled inputs converts the chatter of a mechanical contact into a single clean transition, suppressing the bounces that would otherwise be counted as separate events.
A monostable converts a trigger of arbitrary width or amplitude into a pulse of fixed width $T = RC \ln\!\big(1/(1-\beta)\big)$. Sensors that produce noisy or variable-width pulses are conditioned through a one-shot before further processing.
A retriggerable monostable that is reset by every incoming pulse times out only when the train stops. The resulting output transition signals that pulses are missing; this is the basis of watchdog logic and of arrhythmia detection.
An astable provides the periodic clock that drives sampled systems, pulse-width modulators, and the carriers of Class-D amplifiers. The frequency is set by $R$, $C$, and $\beta$, and is easily tuned.
Pulses for nerve and muscle stimulation are produced by an astable that sets the repetition rate combined with a monostable that sets the pulse width, giving independent control of frequency and on-time.